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General Description The AU5329 is a programmable Dual Fractional Frequency translation based jitter attenuating clock synthesizer with flexible input to output frequency translation options. It supports up to 2 input clocks that are common for all the 2 fractional translations and provides 10 clock outputs. The clock outputs can be derived from the 2 PLLs in a highly flexible manner. It is fully programmable with the I2C / SPI interface or an on chip two time programmable non-volatile memory for factory pre-programmed devices. Using advanced design technology, it provides excellent integrated jitter performance as well as low frequency offset noise performance while working reliably for ambient temperatures from -40 °C to 85 °C. The chip has best in class transient performance features in terms of clock switching transients and repeatable input to output delays Nomenclature: AU5329: 2 input, 10 output, 64-QFN 9 mm X 9 mm AU5329: VDDIN = VDD = 3.3 V or 2.5 V Applications: ? Carrier Ethernet, ? OTN Equipment, ? Microwave Backhaul, ? Gigabit Ethernet, ? Wireless Infrastructure, ? Network Line Cards, ? Small Cells, ? Data Center/Storage, ? SONET/SDH, ? Test / Instrumentation, ? Broadcast Video